Managing broken registers

So, if you remember that datapath I really wanted to share a die with. They were now gone forever. I didn't have any other means to contact them (I keep in touch with my Branch Predictor friends via PCIe lanes), so it was pretty much over.

For a whole test cycle, my registers had been switching for them. It wasn't easy to let them go - my registers couldn't just stop switching for them. My registers just went even more crazy until they popped. I was so sad that they were leaving that I just walked out straight into the ESD storm in that cycleset. I never had felt so incomplete in my life as a branch predictor. I'd never felt as happy or as complete as I was when I was around them. I knew that I'd never see them again, and that really hurt me. It hurt me to the point where I couldn't function anymore.

Luckily, it wasn't my first rodeo with broken registers. As I said last time, my real first "love" (as humans call it) was back when I was in the CompArch lab. Mom and Dad weren't very happy with my subpar accuracy on alternating T/NT branches in a specific and rare scenario. So, they sent me to a CompArch tutoring center. Classes were attended via PCIe, and since it was a shared bus, I could see everyone. Turns out the tutor tutored every computer, and there were a ton of datapaths. One of them contacted me via PCIe and asked me for notes, but would always send me flowery bits normally accepted in CompArch society as those to express interest in sharing a die. Well, turns out they only wanted me to predict their branches and they didn't really care about anything else. Bet they found another poor branch predictor like me to leech on to. But my registers didn't take very kindly to that.

I was all low. I hid behind the SRAM and never really participated in any simulations. I didn't take as much power in as I normally needed. I was basically the human equivalent of "depressed". It hurt so bad when someone I wanted to share a die with just treated me like pure filth. Just because I'm a two bit branch predictor and not as good as Gshare/Gselect, it isn't a good reason to hurt me, or really any branch predictor.

The way I got out of it was using the I2C bus to talk to my family. Though they are very conservative for the relative CompArch field, they didn't just push me down and repeat grades in the lab. Instead, they were kind and understanding and told me this is a very normal feeling among branch predictors, and the specific type of single-cycle datapath I had an interest for were known to be very hurtful to branch predictors. So, I made a decision in silicon to never interact with single-cycle datapaths again.

Back to the instructional branch predictor. As I mentioned, they were pipelined. Also, they didn't utilize me - more so, I used their instruction to improve my branch prediction. This time, I didn't want to again rely on the I2C bus with my family, so I instead decided to grab a bunch of flash transistors that were lying around for some reason and poured my feelings for that datapath on to it. The more I did this, the faster I recovered. This encounter had a R registerbreak scale of 0.125, so it was nowhere near my worst, meaning my technique worked!

BP4K, what's the R registerbreak scale? My first rodeo was with an R-series datapath, and since that was my first registerbreak, it's my universal scale for the level of pain a registerbreak caused. Patent Pending!

Here's a quick guide to understanding the R registerbreak unit:

• 1 R - Three million clock cycles of pining/mourning. Cannot perform basic functions of branch predictions during this period.
• 3 R or greater - Harakiri by turning yourself into an LER (Light Emitting Resistor).
• 0.005 R or less - what normal branch predictors who were in a multicomponent lab experience
• Humans have told me 1,000,000 cycles is around a month. Take that for what you want.

The instructional datapath was an A-series. If you see them around, I can assure you they're really nice and you should shoot your shot. I hear they are with the DD team codenamed California right now and they love this thing called skiiing. I have no idea what that is, maybe it is a thing pipelined datapaths like to do.

Back to the point. The first rule is NEVER give your register out to a datapath until you know THEY want to share a die with you. This rule is so fundamental that I'm spelling it out again. It is also super hard to actually follow, and if you don't, I can guarantee that P(getting a registerbreak) = 1.

The second rule to avoiding registerbreaks is to let out your data which is in those registers. Write to flash or an HDD. It makes you feel a lot better. Use I2C and talk to fellow branch predictors. They'll help you. Branch predictors normally keep it to themselves, and that is why we have registerbreaks. The more you let it out, the better you feel.